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authorDongxue Zhang <elta.era@gmail.com>2015-11-25 20:57:12 +0800
committerLeon Alrae <leon.alrae@imgtec.com>2016-01-23 14:30:04 +0000
commit889912999d3f089cb8b6db8763ebec11022768b9 (patch)
treee1954ca5dd8040bcc07cac8366c49ea651c54c46 /target-mips/cpu.h
parent047e363b05679724d6b784c6ec6310697fe48ba0 (diff)
downloadqemu-arm-889912999d3f089cb8b6db8763ebec11022768b9.tar.gz
target-mips/cpu.h: Fix spell error
CP0IntCtl_IPPC1, the last letter should be 'i', not 'one'. Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r--target-mips/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 89c01f7a38..17817c3c57 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -358,7 +358,7 @@ struct CPUMIPSState {
#define CP0St_IE 0
int32_t CP0_IntCtl;
#define CP0IntCtl_IPTI 29
-#define CP0IntCtl_IPPC1 26
+#define CP0IntCtl_IPPCI 26
#define CP0IntCtl_VS 5
int32_t CP0_SRSCtl;
#define CP0SRSCtl_HSS 26