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authorLeon Alrae <leon.alrae@imgtec.com>2015-02-20 13:07:45 +0000
committerLeon Alrae <leon.alrae@imgtec.com>2015-03-11 14:13:57 +0000
commit644511117e7ca9f26d633a59c202a297113a796c (patch)
tree1a213779e8c4320e00ef6f24c0a49705aef1ac96 /target-mips/cpu.h
parent04cd79625fa4103c5839ba36ad476dd22f7f7557 (diff)
downloadqemu-arm-644511117e7ca9f26d633a59c202a297113a796c.tar.gz
target-mips: add missing MSACSR and restore fp_status and hflags
Save MSACSR state. Also remove fp_status, msa_fp_status, hflags and restore them in post_load() from the architectural registers. Float exception flags are not present in vmstate. Information they carry is used only by softfloat caller who translates them into MIPS FCSR.Cause, FCSR.Flags and then they are cleared. Therefore there is no need for saving them in vmstate. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r--target-mips/cpu.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 59a2373245..283a546854 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -786,6 +786,23 @@ static inline void restore_flush_mode(CPUMIPSState *env)
&env->active_fpu.fp_status);
}
+static inline void restore_fp_status(CPUMIPSState *env)
+{
+ restore_rounding_mode(env);
+ restore_flush_mode(env);
+}
+
+static inline void restore_msa_fp_status(CPUMIPSState *env)
+{
+ float_status *status = &env->active_tc.msa_fp_status;
+ int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
+ bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
+
+ set_float_rounding_mode(ieee_rm[rounding_mode], status);
+ set_flush_to_zero(flush_to_zero, status);
+ set_flush_inputs_to_zero(flush_to_zero, status);
+}
+
static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{