diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-18 11:57:27 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-18 11:57:27 +0000 |
| commit | f01be154589f6e137195d9cc28d1296d885e4eea (patch) | |
| tree | b8effdfbfaddddcbbd81e876a62ff18da6686c0f /target-mips/TODO | |
| parent | a1cf28f469883f89e83d6026986254806e88c235 (diff) | |
Move the active FPU registers into env again, and use more TCG registers
to access them.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/TODO')
| -rw-r--r-- | target-mips/TODO | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target-mips/TODO b/target-mips/TODO index bb18fa8d85..4769e2a3ae 100644 --- a/target-mips/TODO +++ b/target-mips/TODO @@ -30,11 +30,6 @@ General each ASID change. Using the MMU modes to implement ASIDs hinges on implementing the global bit efficiently. - save/restore of the CPU state is not implemented (see machine.c). -- Improve cpu state handling: - Step 1) Collect all the TC state in a single struct, so we need only - a single global pointer for the active TC. - Step 2) Use only a single TC context as working context, and copy the - contexts on TC switch. Likewise for FPU contexts. MIPS64 ------ |