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authorAndreas Färber <afaerber@suse.de>2013-06-16 07:28:50 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-09 21:33:04 +0200
commita0762859ae2aae2e221c59e2541f964f1350d68b (patch)
tree570d02d8ff3f926b9384186a1742b068c8042458 /target-microblaze
parent518e9d7d486273f4ee8d38946e73a7483aca4a92 (diff)
downloadqemu-arm-a0762859ae2aae2e221c59e2541f964f1350d68b.tar.gz
log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-microblaze')
-rw-r--r--target-microblaze/cpu.c2
-rw-r--r--target-microblaze/helper.c12
-rw-r--r--target-microblaze/translate.c2
3 files changed, 8 insertions, 8 deletions
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index a0fcdf4464..d93519e465 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -35,7 +35,7 @@ static void mb_cpu_reset(CPUState *s)
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", s->cpu_index);
- log_cpu_state(env, 0);
+ log_cpu_state(s, 0);
}
mcc->parent_reset(s);
diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
index 01d4bbfe92..c6c96d4488 100644
--- a/target-microblaze/helper.c
+++ b/target-microblaze/helper.c
@@ -152,7 +152,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
"hw exception at pc=%x ear=%x esr=%x iflags=%x\n",
env->sregs[SR_PC], env->sregs[SR_EAR],
env->sregs[SR_ESR], env->iflags);
- log_cpu_state_mask(CPU_LOG_INT, env, 0);
+ log_cpu_state_mask(CPU_LOG_INT, cs, 0);
env->iflags &= ~(IMM_FLAG | D_FLAG);
env->sregs[SR_PC] = cpu->base_vectors + 0x20;
break;
@@ -175,7 +175,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
"bimm exception at pc=%x iflags=%x\n",
env->sregs[SR_PC], env->iflags);
env->regs[17] -= 4;
- log_cpu_state_mask(CPU_LOG_INT, env, 0);
+ log_cpu_state_mask(CPU_LOG_INT, cs, 0);
}
} else if (env->iflags & IMM_FLAG) {
D(qemu_log("IMM_FLAG set at exception\n"));
@@ -192,7 +192,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"exception at pc=%x ear=%x iflags=%x\n",
env->sregs[SR_PC], env->sregs[SR_EAR], env->iflags);
- log_cpu_state_mask(CPU_LOG_INT, env, 0);
+ log_cpu_state_mask(CPU_LOG_INT, cs, 0);
env->iflags &= ~(IMM_FLAG | D_FLAG);
env->sregs[SR_PC] = cpu->base_vectors + 0x20;
break;
@@ -222,7 +222,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
env->sregs[SR_PC], env->sregs[SR_MSR], t, env->iflags,
sym);
- log_cpu_state(env, 0);
+ log_cpu_state(cs, 0);
}
}
#endif
@@ -236,7 +236,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
env->regs[14] = env->sregs[SR_PC];
env->sregs[SR_PC] = cpu->base_vectors + 0x10;
- //log_cpu_state_mask(CPU_LOG_INT, env, 0);
+ //log_cpu_state_mask(CPU_LOG_INT, cs, 0);
break;
case EXCP_BREAK:
@@ -247,7 +247,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"break at pc=%x msr=%x %x iflags=%x\n",
env->sregs[SR_PC], env->sregs[SR_MSR], t, env->iflags);
- log_cpu_state_mask(CPU_LOG_INT, env, 0);
+ log_cpu_state_mask(CPU_LOG_INT, cs, 0);
env->sregs[SR_MSR] &= ~(MSR_VMS | MSR_UMS | MSR_VM | MSR_UM);
env->sregs[SR_MSR] |= t;
env->sregs[SR_MSR] |= MSR_BIP;
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index b5cb14163a..eba255b7c6 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1777,7 +1777,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
#if !SIM_COMPAT
qemu_log("--------------\n");
- log_cpu_state(env, 0);
+ log_cpu_state(CPU(cpu), 0);
#endif
}