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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2013-03-28 22:59:03 +0100
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2013-04-02 10:47:29 +0200
commit5d45de9796539f95eb6b1201588362981f8cb2d4 (patch)
tree8111e5e8564e40821d102fc54225df777e705da7 /target-microblaze
parent174d4d215fb49b4d43196e62f22c2533431b260e (diff)
microblaze: Add support for the sleep insn
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-microblaze')
-rw-r--r--target-microblaze/translate.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index a74da8e1a5..06d23460f9 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1317,6 +1317,23 @@ static void dec_br(DisasContext *dc)
/* Memory barrier. */
mbar = (dc->ir >> 16) & 31;
if (mbar == 2 && dc->imm == 4) {
+ /* mbar IMM & 16 decodes to sleep. */
+ if (dc->rd & 16) {
+ TCGv_i32 tmp_hlt = tcg_const_i32(EXCP_HLT);
+ TCGv_i32 tmp_1 = tcg_const_i32(1);
+
+ LOG_DIS("sleep\n");
+
+ t_sync_flags(dc);
+ tcg_gen_st_i32(tmp_1, cpu_env,
+ -offsetof(MicroBlazeCPU, env)
+ +offsetof(CPUState, halted));
+ tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc + 4);
+ gen_helper_raise_exception(cpu_env, tmp_hlt);
+ tcg_temp_free_i32(tmp_hlt);
+ tcg_temp_free_i32(tmp_1);
+ return;
+ }
LOG_DIS("mbar %d\n", dc->rd);
/* Break the TB. */
dc->cpustate_changed = 1;