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authorAlistair Francis <alistair.francis@xilinx.com>2015-06-18 21:16:35 -0700
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2015-06-21 17:20:16 +1000
commita88bbb006a523deabb90245a283d1914abd34e3e (patch)
tree18738f57f51b31b3c55d3f29a697afcc2c6f980b /target-microblaze/cpu.c
parenta6c3ed24748f06742413e174167b0faa7030c244 (diff)
downloadqemu-arm-a88bbb006a523deabb90245a283d1914abd34e3e.tar.gz
target-microblaze: Convert endi to a CPU property
Originally the endi PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-microblaze/cpu.c')
-rw-r--r--target-microblaze/cpu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index 92c51a043e..8429275b51 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -114,7 +114,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) |
(cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) |
- (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0);
+ (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) |
+ (cpu->cfg.endi ? PVR0_ENDI_MASK : 0);
env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |
(cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0);
@@ -174,6 +175,7 @@ static Property mb_properties[] = {
DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
false),
+ DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
DEFINE_PROP_END_OF_LIST(),
};