aboutsummaryrefslogtreecommitdiff
path: root/target-microblaze/cpu.c
diff options
context:
space:
mode:
authorAndreas Färber <afaerber@suse.de>2012-04-12 02:17:53 +0200
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2012-04-24 16:04:56 +0200
commitb77f98cadad07a0863a6bfe1492c64f3a16ccbc5 (patch)
treefd7f38f6ce885763259245a9564028e369a8e788 /target-microblaze/cpu.c
parentaa0d1267b3aa69c87fbd37a896bdd3f44d45c3f3 (diff)
target-microblaze: QOM'ify CPU
Embed CPUMBState as first member of QOM MicroBlazeCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> [AF: Updated cpu.c to include cpu-qom.h indirectly via cpu.h]
Diffstat (limited to 'target-microblaze/cpu.c')
-rw-r--r--target-microblaze/cpu.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
new file mode 100644
index 0000000000..21b62c62c9
--- /dev/null
+++ b/target-microblaze/cpu.c
@@ -0,0 +1,59 @@
+/*
+ * QEMU MicroBlaze CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+
+#include "cpu.h"
+#include "qemu-common.h"
+
+
+/* CPUClass::reset() */
+static void mb_cpu_reset(CPUState *s)
+{
+ MicroBlazeCPU *cpu = MICROBLAZE_CPU(s);
+ MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(cpu);
+ CPUMBState *env = &cpu->env;
+
+ mcc->parent_reset(s);
+
+ cpu_state_reset(env);
+}
+
+static void mb_cpu_class_init(ObjectClass *oc, void *data)
+{
+ CPUClass *cc = CPU_CLASS(oc);
+ MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_CLASS(oc);
+
+ mcc->parent_reset = cc->reset;
+ cc->reset = mb_cpu_reset;
+}
+
+static const TypeInfo mb_cpu_type_info = {
+ .name = TYPE_MICROBLAZE_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(MicroBlazeCPU),
+ .class_size = sizeof(MicroBlazeCPUClass),
+ .class_init = mb_cpu_class_init,
+};
+
+static void mb_cpu_register_types(void)
+{
+ type_register_static(&mb_cpu_type_info);
+}
+
+type_init(mb_cpu_register_types)