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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-03 11:13:39 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-03 11:13:39 +0000
commit20dcee9483361ee0621cf6d68d271ecde686fd9c (patch)
tree12935f98ad16a1c931026d01ed76beaaea0550a4 /target-m68k/cpu.h
parent62ea5b0bd38471ef114ca2e2dd7507a778701cd3 (diff)
MCF5208 emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2924 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-m68k/cpu.h')
-rw-r--r--target-m68k/cpu.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index acbb51690d..6f29d5e5c4 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -59,6 +59,10 @@ typedef struct CPUM68KState {
uint32_t pc;
uint32_t sr;
+ /* SSP and USP. The current_sp is stored in aregs[7], the other here. */
+ int current_sp;
+ uint32_t sp[2];
+
/* Condition flags. */
uint32_t cc_op;
uint32_t cc_dest;
@@ -92,6 +96,7 @@ typedef struct CPUM68KState {
uint32_t vbr;
uint32_t mbar;
uint32_t rambar0;
+ uint32_t cacr;
uint32_t features;
@@ -151,6 +156,12 @@ enum {
#define SR_S 0x2000
#define SR_T 0x8000
+#define M68K_SSP 0
+#define M68K_USP 1
+
+/* CACR fields are implementation defined, but some bits are common. */
+#define M68K_CACR_EUSP 0x10
+
#define MACSR_PAV0 0x100
#define MACSR_OMC 0x080
#define MACSR_SU 0x040
@@ -167,6 +178,7 @@ int cpu_m68k_set_model(CPUM68KState *env, const char * name);
void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector);
void m68k_set_macsr(CPUM68KState *env, uint32_t val);
+void m68k_switch_sp(CPUM68KState *env);
#define M68K_FPCR_PREC (1 << 6)
@@ -179,6 +191,7 @@ enum m68k_features {
M68K_FEATURE_CF_FPU,
M68K_FEATURE_CF_MAC,
M68K_FEATURE_CF_EMAC,
+ M68K_FEATURE_USP,
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
M68K_FEATURE_WORD_INDEX /* word sized address index registers. */
};