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authorAndreas Färber <afaerber@suse.de>2013-08-26 08:31:06 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:20:46 +0100
commit27103424c40ce71053c07d8a54ef431365fa9b7f (patch)
treebec190ce2f52c17d5f5963d743f6c64af47c9240 /target-i386
parent6f03bef0ffc5cd75ac5ffcca0383c489ae48108c (diff)
downloadqemu-arm-27103424c40ce71053c07d8a54ef431365fa9b7f.tar.gz
cpu: Move exception_index field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/excp_helper.c4
-rw-r--r--target-i386/helper.c6
-rw-r--r--target-i386/mem_helper.c5
-rw-r--r--target-i386/misc_helper.c9
-rw-r--r--target-i386/seg_helper.c8
-rw-r--r--target-i386/svm_helper.c12
6 files changed, 26 insertions, 18 deletions
diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c
index 5319aef7df..ec76eba760 100644
--- a/target-i386/excp_helper.c
+++ b/target-i386/excp_helper.c
@@ -94,6 +94,8 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
int is_int, int error_code,
int next_eip_addend)
{
+ CPUState *cs = CPU(x86_env_get_cpu(env));
+
if (!is_int) {
cpu_svm_check_intercept_param(env, SVM_EXIT_EXCP_BASE + intno,
error_code);
@@ -102,7 +104,7 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
cpu_svm_check_intercept_param(env, SVM_EXIT_SWINT, 0);
}
- env->exception_index = intno;
+ cs->exception_index = intno;
env->error_code = error_code;
env->exception_is_int = is_int;
env->exception_next_eip = env->eip + next_eip_addend;
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 4910e40c17..6d9bd71a3a 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -496,7 +496,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
env->cr[2] = addr;
env->error_code = (is_write << PG_ERROR_W_BIT);
env->error_code |= PG_ERROR_U_MASK;
- env->exception_index = EXCP0E_PAGE;
+ cs->exception_index = EXCP0E_PAGE;
return 1;
}
@@ -561,7 +561,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
sext = (int64_t)addr >> 47;
if (sext != 0 && sext != -1) {
env->error_code = 0;
- env->exception_index = EXCP0D_GPF;
+ cs->exception_index = EXCP0D_GPF;
return 1;
}
@@ -892,7 +892,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
env->cr[2] = addr;
}
env->error_code = error_code;
- env->exception_index = EXCP0E_PAGE;
+ cs->exception_index = EXCP0E_PAGE;
return 1;
}
diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c
index 5b25ccd605..c0d3b45552 100644
--- a/target-i386/mem_helper.c
+++ b/target-i386/mem_helper.c
@@ -136,15 +136,16 @@ void tlb_fill(CPUX86State *env, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr)
{
X86CPU *cpu = x86_env_get_cpu(env);
+ CPUState *cs = CPU(cpu);
int ret;
- ret = x86_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
+ ret = x86_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (ret) {
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(env, retaddr);
}
- raise_exception_err(env, env->exception_index, env->error_code);
+ raise_exception_err(env, cs->exception_index, env->error_code);
}
}
#endif
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
index 47f6a2f7c1..582ad34ffe 100644
--- a/target-i386/misc_helper.c
+++ b/target-i386/misc_helper.c
@@ -568,10 +568,11 @@ void helper_rdmsr(CPUX86State *env)
static void do_pause(X86CPU *cpu)
{
+ CPUState *cs = CPU(cpu);
CPUX86State *env = &cpu->env;
/* Just let another CPU run. */
- env->exception_index = EXCP_INTERRUPT;
+ cs->exception_index = EXCP_INTERRUPT;
cpu_loop_exit(env);
}
@@ -582,7 +583,7 @@ static void do_hlt(X86CPU *cpu)
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
cs->halted = 1;
- env->exception_index = EXCP_HLT;
+ cs->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -638,6 +639,8 @@ void helper_pause(CPUX86State *env, int next_eip_addend)
void helper_debug(CPUX86State *env)
{
- env->exception_index = EXCP_DEBUG;
+ CPUState *cs = CPU(x86_env_get_cpu(env));
+
+ cs->exception_index = EXCP_DEBUG;
cpu_loop_exit(env);
}
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 9dda02d2f1..c8fd572d99 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -935,7 +935,9 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
#if defined(CONFIG_USER_ONLY)
void helper_syscall(CPUX86State *env, int next_eip_addend)
{
- env->exception_index = EXCP_SYSCALL;
+ CPUState *cs = CPU(x86_env_get_cpu(env));
+
+ cs->exception_index = EXCP_SYSCALL;
env->exception_next_eip = env->eip + next_eip_addend;
cpu_loop_exit(env);
}
@@ -1248,7 +1250,7 @@ void x86_cpu_do_interrupt(CPUState *cs)
/* if user mode only, we simulate a fake exception
which will be handled outside the cpu execution
loop */
- do_interrupt_user(env, env->exception_index,
+ do_interrupt_user(env, cs->exception_index,
env->exception_is_int,
env->error_code,
env->exception_next_eip);
@@ -1258,7 +1260,7 @@ void x86_cpu_do_interrupt(CPUState *cs)
/* simulate a real cpu exception. On i386, it can
trigger new exceptions, but we do not handle
double or triple faults yet. */
- do_interrupt_all(cpu, env->exception_index,
+ do_interrupt_all(cpu, cs->exception_index,
env->exception_is_int,
env->error_code,
env->exception_next_eip, 0);
diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
index bc33e61672..5e0504d7f0 100644
--- a/target-i386/svm_helper.c
+++ b/target-i386/svm_helper.c
@@ -320,7 +320,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
/* FIXME: need to implement valid_err */
switch (event_inj & SVM_EVTINJ_TYPE_MASK) {
case SVM_EVTINJ_TYPE_INTR:
- env->exception_index = vector;
+ cs->exception_index = vector;
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = -1;
@@ -329,7 +329,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
do_interrupt_x86_hardirq(env, vector, 1);
break;
case SVM_EVTINJ_TYPE_NMI:
- env->exception_index = EXCP02_NMI;
+ cs->exception_index = EXCP02_NMI;
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = env->eip;
@@ -337,7 +337,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
cpu_loop_exit(env);
break;
case SVM_EVTINJ_TYPE_EXEPT:
- env->exception_index = vector;
+ cs->exception_index = vector;
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = -1;
@@ -345,7 +345,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
cpu_loop_exit(env);
break;
case SVM_EVTINJ_TYPE_SOFT:
- env->exception_index = vector;
+ cs->exception_index = vector;
env->error_code = event_inj_err;
env->exception_is_int = 1;
env->exception_next_eip = env->eip;
@@ -353,7 +353,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
cpu_loop_exit(env);
break;
}
- qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", env->exception_index,
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", cs->exception_index,
env->error_code);
}
}
@@ -768,7 +768,7 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
#GP fault is delivered inside the host. */
/* remove any pending exception */
- env->exception_index = -1;
+ cs->exception_index = -1;
env->error_code = 0;
env->old_exception = -1;