diff options
| author | Richard Henderson <rth@twiddle.net> | 2013-01-23 18:06:18 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2013-02-18 15:52:32 -0800 |
| commit | 5f1f4b177152286102475f9bffc359002a14d9c9 (patch) | |
| tree | 7b26523cae4ac0a78ca6b9bd1474bacc8a4fed7c /target-i386/translate.c | |
| parent | 02ea1e6b4fab803551bbea47eea29bc7709ba008 (diff) | |
target-i386: Implement MULX
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-i386/translate.c')
| -rw-r--r-- | target-i386/translate.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index 2bb8d9f8c3..3017d63163 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -4099,6 +4099,45 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, set_cc_op(s, CC_OP_BMILGB + ot); break; + case 0x3f6: /* mulx By, Gy, rdx, Ey */ + if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI2) + || !(s->prefix & PREFIX_VEX) + || s->vex_l != 0) { + goto illegal_op; + } + ot = s->dflag == 2 ? OT_QUAD : OT_LONG; + gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); + switch (ot) { + TCGv_i64 t0, t1; + default: + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); +#ifdef TARGET_X86_64 + tcg_gen_ext32u_i64(t0, cpu_T[0]); + tcg_gen_ext32u_i64(t1, cpu_regs[R_EDX]); +#else + tcg_gen_extu_i32_i64(t0, cpu_T[0]); + tcg_gen_extu_i32_i64(t0, cpu_regs[R_EDX]); +#endif + tcg_gen_mul_i64(t0, t0, t1); + tcg_gen_trunc_i64_tl(cpu_T[0], t0); + tcg_gen_shri_i64(t0, t0, 32); + tcg_gen_trunc_i64_tl(cpu_T[1], t0); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + gen_op_mov_reg_T0(OT_LONG, s->vex_v); + gen_op_mov_reg_T1(OT_LONG, reg); + break; +#ifdef TARGET_X86_64 + case OT_QUAD: + tcg_gen_mov_tl(cpu_T[1], cpu_regs[R_EDX]); + tcg_gen_mul_tl(cpu_regs[s->vex_v], cpu_T[0], cpu_T[1]); + gen_helper_umulh(cpu_regs[reg], cpu_T[0], cpu_T[1]); + break; +#endif + } + break; + case 0x0f3: case 0x1f3: case 0x2f3: |