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authorAndreas Färber <afaerber@suse.de>2013-01-18 15:03:43 +0100
committerAndreas Färber <afaerber@suse.de>2013-03-12 10:35:55 +0100
commitc3affe5670e5d0df8a7e06f1d6e80853633146df (patch)
treebc2a6d0877cf7aea8821053cf6c8df10f167caa5 /target-i386/helper.c
parentd8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (diff)
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-i386/helper.c')
-rw-r--r--target-i386/helper.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c
index b49a0fc5f3..9449a0c49d 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -389,7 +389,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
#endif
/* if the cpu is currently executing code, we must unlink it and
all the potentially executing TB */
- cpu_interrupt(env, CPU_INTERRUPT_EXITTB);
+ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_EXITTB);
/* when a20 is changed, all the MMU mappings are invalid, so
we must flush everything */
@@ -1169,7 +1169,7 @@ static void do_inject_x86_mce(void *data)
banks[3] = params->misc;
cenv->mcg_status = params->mcg_status;
banks[1] = params->status;
- cpu_interrupt(cenv, CPU_INTERRUPT_MCE);
+ cpu_interrupt(cpu, CPU_INTERRUPT_MCE);
} else if (!(banks[1] & MCI_STATUS_VAL)
|| !(banks[1] & MCI_STATUS_UC)) {
if (banks[1] & MCI_STATUS_VAL) {
@@ -1241,7 +1241,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
if (kvm_enabled()) {
env->tpr_access_type = access;
- cpu_interrupt(env, CPU_INTERRUPT_TPR);
+ cpu_interrupt(CPU(x86_env_get_cpu(env)), CPU_INTERRUPT_TPR);
} else {
cpu_restore_state(env, env->mem_io_pc);