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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-21 16:34:06 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-21 16:34:06 +0000
commit3bd7da9e1851f024919c07eba4c29acf209ecd6e (patch)
treeff29adc10afaaa64727ae8141b6826fe4df8fad9 /target-i386/TODO
parentcec6843e87fe29d8419fd5a9ed9912729c068656 (diff)
downloadqemu-arm-3bd7da9e1851f024919c07eba4c29acf209ecd6e.tar.gz
convert remaining segment handling to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4514 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/TODO')
-rw-r--r--target-i386/TODO3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-i386/TODO b/target-i386/TODO
index 53be196415..15a3b36602 100644
--- a/target-i386/TODO
+++ b/target-i386/TODO
@@ -4,7 +4,6 @@ Correctness issues:
- SVM: rework the implementation: simplify code, move most intercept
tests as dynamic, correct segment access, verify exception safety,
cpu save/restore, SMM save/restore.
-- arpl eflags computation is invalid
- x86_64: fxsave/fxrestore intel/amd differences
- x86_64: lcall/ljmp intel/amd differences ?
- x86_64: cmpxchgl intel/amd differences ?
@@ -32,6 +31,8 @@ Optimizations/Features:
- add VMX support
- add AVX support
- add SSE5 support
+- faster EFLAGS update: consider SZAP, C, O can be updated separately
+ with a bit field in CC_OP and more state variables.
- evaluate x87 stack pointer statically
- find a way to avoid translating several time the same TB if CR0.TS
is set or not.