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authorAndreas Färber <afaerber@suse.de>2013-09-04 01:29:02 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:52:47 +0100
commit31b030d4abc5bea89c2b33b39d3b302836f6b6ee (patch)
treeb2f19b80c2e6b0d8b4cb155f5ae62fb1c04462dd /target-cris
parent0063ebd6ac5ce0a17896d05f117757a6ebf3ca96 (diff)
cputlb: Change tlb_flush_page() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-cris')
-rw-r--r--target-cris/mmu.c3
-rw-r--r--target-cris/op_helper.c12
2 files changed, 11 insertions, 4 deletions
diff --git a/target-cris/mmu.c b/target-cris/mmu.c
index 512e28b481..1c95a415f2 100644
--- a/target-cris/mmu.c
+++ b/target-cris/mmu.c
@@ -290,6 +290,7 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
{
+ CRISCPU *cpu = cris_env_get_cpu(env);
target_ulong vaddr;
unsigned int idx;
uint32_t lo, hi;
@@ -315,7 +316,7 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
vaddr = tlb_vpn << TARGET_PAGE_BITS;
D_LOG("flush pid=%x vaddr=%x\n",
pid, vaddr);
- tlb_flush_page(env, vaddr);
+ tlb_flush_page(CPU(cpu), vaddr);
}
}
}
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index d28bd61778..bd9a583f9a 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -98,8 +98,11 @@ void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
{
#if !defined(CONFIG_USER_ONLY)
- tlb_flush_page(env, env->pregs[PR_SPC]);
- tlb_flush_page(env, new_spc);
+ CRISCPU *cpu = cris_env_get_cpu(env);
+ CPUState *cs = CPU(cpu);
+
+ tlb_flush_page(cs, env->pregs[PR_SPC]);
+ tlb_flush_page(cs, new_spc);
#endif
}
@@ -114,6 +117,9 @@ void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
{
+#if !defined(CONFIG_USER_ONLY)
+ CRISCPU *cpu = cris_env_get_cpu(env);
+#endif
uint32_t srs;
srs = env->pregs[PR_SRS];
srs &= 3;
@@ -155,7 +161,7 @@ void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
vaddr, tlb_v, env->pc);
if (tlb_v) {
- tlb_flush_page(env, vaddr);
+ tlb_flush_page(CPU(cpu), vaddr);
}
}
}