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authorPeter Maydell <peter.maydell@linaro.org>2016-02-02 18:20:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-02-03 13:54:41 +0000
commit3c2f7bb32b4c597925c5c7411307d51f1a56045d (patch)
tree784a3a03d07feb3a1c1392c1fece9592e9cbf64a /target-arm
parent0602f420e40769b1d2829dd326bb632cc71aa407 (diff)
downloadqemu-arm-3c2f7bb32b4c597925c5c7411307d51f1a56045d.tar.gz
target-arm: Don't report presence of EL2 if it doesn't exist
We already modify the processor feature bits to not report EL3 support to the guest if EL3 isn't enabled for the CPU we're emulating. Add similar support for not reporting EL2 unless it is enabled. This is necessary because real world guest code running at EL3 (trusted firmware or bootloaders) will query the ID registers to determine whether it should start a guest Linux kernel in EL2 or EL3. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1454437242-10262-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/cpu.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 0e582c4410..7ddbf3d19b 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -650,6 +650,15 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
cpu->id_aa64pfr0 &= ~0xf000;
}
+ if (!arm_feature(env, ARM_FEATURE_EL2)) {
+ /* Disable the hypervisor feature bits in the processor feature
+ * registers if we don't have EL2. These are id_pfr1[15:12] and
+ * id_aa64pfr0_el1[11:8].
+ */
+ cpu->id_aa64pfr0 &= ~0xf00;
+ cpu->id_pfr1 &= ~0xf000;
+ }
+
if (!cpu->has_mpu) {
unset_feature(env, ARM_FEATURE_MPU);
}