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authorPeter Maydell <peter.maydell@linaro.org>2011-05-19 14:46:18 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-05-23 22:39:36 +0200
commit36802b6b1ed7887aeae5d027f86a969400f8824a (patch)
tree2ef460bb4d8f3515c4e9ae912940bd8ace4cf078 /target-arm
parente6afc87f804abee7d0479be5e8e31c56d885fafb (diff)
target-arm: Signal Underflow when denormal flushed to zero on output
On ARM the architecture mandates that when an output denormal is flushed to zero we must set the FPSCR UFC (underflow) bit, so map softfloat's float_flag_output_denormal accordingly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f07252768a..05b3ccca2d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2355,7 +2355,7 @@ static inline int vfp_exceptbits_from_host(int host_bits)
target_bits |= 2;
if (host_bits & float_flag_overflow)
target_bits |= 4;
- if (host_bits & float_flag_underflow)
+ if (host_bits & (float_flag_underflow | float_flag_output_denormal))
target_bits |= 8;
if (host_bits & float_flag_inexact)
target_bits |= 0x10;