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authorPeter Maydell <peter.maydell@linaro.org>2012-02-07 17:56:57 +0000
committerAndrzej Zaborowski <balrogg@gmail.com>2012-02-17 08:15:06 +0100
commit2d2624a001010548e3e170d812e0f116b78501aa (patch)
treed6934a9f31b20174e85369d0f3dd50cc8e08abd9 /target-arm
parentdd4427a6194eb4efd38542737a053ca474039a76 (diff)
target-arm/helper.c: Correct FPSID value for Cortex-A9
The correct FPSID for the Cortex-A9 (according to the TRM) is 0x41033090 for the r0p0 that we claim to model. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index ea4f35fb6c..34b226ecf0 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -157,7 +157,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
* and valid configurations; we don't model A9UP).
*/
set_feature(env, ARM_FEATURE_V7MP);
- env->vfp.xregs[ARM_VFP_FPSID] = 0x41034000; /* Guess */
+ env->vfp.xregs[ARM_VFP_FPSID] = 0x41033090;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222;
env->vfp.xregs[ARM_VFP_MVFR1] = 0x01111111;
memcpy(env->cp15.c0_c1, cortexa9_cp15_c0_c1, 8 * sizeof(uint32_t));