aboutsummaryrefslogtreecommitdiff
path: root/target-arm/translate.c
diff options
context:
space:
mode:
authorGreg Bellows <greg.bellows@linaro.org>2014-10-24 12:19:14 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-10-24 12:19:14 +0100
commitdcbff19bd07c198f4f9bdbf2db740a8e282dd5f6 (patch)
treea304e8bdf598a72b540eb0b84ab4bca496b7f4d3 /target-arm/translate.c
parent027fc52704b815bd67a92399d255f066308ca70c (diff)
downloadqemu-arm-dcbff19bd07c198f4f9bdbf2db740a8e282dd5f6.tar.gz
target-arm: rename arm_current_pl to arm_current_el
Renamed the arm_current_pl CPU function to more accurately represent that it returns the ARMv8 EL rather than ARMv7 PL. Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1413910544-20150-5-git-send-email-greg.bellows@linaro.org [PMM: fixed a minor merge resolution error in a couple of hunks] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r--target-arm/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 656b09e115..1d52e4774f 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7077,7 +7077,7 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
ENCODE_CP_REG(cpnum, is64, crn, crm, opc1, opc2));
if (ri) {
/* Check access permissions */
- if (!cp_access_ok(s->current_pl, ri, isread)) {
+ if (!cp_access_ok(s->current_el, ri, isread)) {
return 1;
}
@@ -11011,7 +11011,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
dc->vec_stride = ARM_TBFLAG_VECSTRIDE(tb->flags);
dc->c15_cpar = ARM_TBFLAG_XSCALE_CPAR(tb->flags);
dc->cp_regs = cpu->cp_regs;
- dc->current_pl = arm_current_pl(env);
+ dc->current_el = arm_current_el(env);
dc->features = env->features;
/* Single step state. The code-generation logic here is: