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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-05-27 17:09:52 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-27 17:09:52 +0100
commit28c9457df08755ef7d98eb58b17e0e0898553b41 (patch)
tree6e12461d1ffe338fc977d9d022f2762583e4e3a9 /target-arm/translate.c
parent1b1742386c82541d65a5068d9d5da42c3b4f61a5 (diff)
downloadqemu-arm-28c9457df08755ef7d98eb58b17e0e0898553b41.tar.gz
target-arm: Add SPSR entries for EL2/HYP and EL3/MON
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-12-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r--target-arm/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 08732a0c05..c2dfbfe477 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11052,8 +11052,8 @@ void gen_intermediate_code_pc(CPUARMState *env, TranslationBlock *tb)
}
static const char *cpu_mode_names[16] = {
- "usr", "fiq", "irq", "svc", "???", "???", "???", "abt",
- "???", "???", "???", "und", "???", "???", "???", "sys"
+ "usr", "fiq", "irq", "svc", "???", "???", "mon", "abt",
+ "???", "???", "hyp", "und", "???", "???", "???", "sys"
};
void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,