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authorRichard Henderson <rth@twiddle.net>2015-09-17 15:58:10 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:28 +1100
commitb933066ae03d924a92b2616b4a24e7d91cd5b841 (patch)
treea5475afc2a27a25b4f91c8376d68daec05183e2e /target-arm/translate-a64.c
parent959082fc4a93a016a6b697e1e0c2b373d8a3a373 (diff)
downloadqemu-arm-b933066ae03d924a92b2616b4a24e7d91cd5b841.tar.gz
target-*: Introduce and use cpu_breakpoint_test
Reduce the boilerplate required for each target. At the same time, move the test for breakpoint after calling tcg_gen_insn_start. Note that arm and aarch64 do not use cpu_breakpoint_test, but still move the inline test down after tcg_gen_insn_start. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm/translate-a64.c')
-rw-r--r--target-arm/translate-a64.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 4670941084..bc2040e47b 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11007,7 +11007,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
CPUState *cs = CPU(cpu);
CPUARMState *env = &cpu->env;
DisasContext dc1, *dc = &dc1;
- CPUBreakpoint *bp;
int j, lj;
target_ulong pc_start;
target_ulong next_page_start;
@@ -11079,18 +11078,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
tcg_clear_temp_count();
do {
- if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
- QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
- if (bp->pc == dc->pc) {
- gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
- /* Advance PC so that clearing the breakpoint will
- invalidate this TB. */
- dc->pc += 2;
- goto done_generating;
- }
- }
- }
-
if (search_pc) {
j = tcg_op_buf_count();
if (lj < j) {
@@ -11106,6 +11093,19 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
tcg_gen_insn_start(dc->pc);
num_insns++;
+ if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
+ CPUBreakpoint *bp;
+ QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
+ if (bp->pc == dc->pc) {
+ gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
+ /* Advance PC so that clearing the breakpoint will
+ invalidate this TB. */
+ dc->pc += 2;
+ goto done_generating;
+ }
+ }
+ }
+
if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
gen_io_start();
}