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authorPeter Maydell <peter.maydell@linaro.org>2014-06-19 18:06:25 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-06-19 18:06:25 +0100
commit4063452eca8aaa432b5c42b1ccea81be01219b0e (patch)
treea1f19a503da4f9d975aab5c78a558cee687d38f3 /target-arm/translate-a64.c
parent220ad4ca846d8e0734dd2d2af38c61a6f5436d66 (diff)
target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()
In handle_simd_shift_fpint_conv(), the combination of is_double == true, is_scalar == false and is_q == false is an unallocated encoding; the 'both parts false' case of the nested ?: expression for calculating maxpass is therefore unreachable and can be removed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1402171881-14343-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/translate-a64.c')
-rw-r--r--target-arm/translate-a64.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index cbc8a3574d..33b5025fee 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -6539,7 +6539,7 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar,
tcg_shift = tcg_const_i32(fracbits);
if (is_double) {
- int maxpass = is_scalar ? 1 : is_q ? 2 : 1;
+ int maxpass = is_scalar ? 1 : 2;
for (pass = 0; pass < maxpass; pass++) {
TCGv_i64 tcg_op = tcg_temp_new_i64();