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authorJulian Brown <julian@codesourcery.com>2016-11-07 10:00:24 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-11-07 10:00:24 +0000
commit3823b9db77e753041c04c161ac9f4d4cfc661520 (patch)
tree562d8576d51d02c44808de584da8d0781d5ca9a6 /target-arm/helper.c
parent3bc4b52ccd7754de4fb177871f1c5eaaa61ec7ef (diff)
Fix corruption of CPSR when SCTLR.EE is set
Fix a typo in arm_cpu_do_interrupt_aarch32 (OR'ing with ~CPSR_E instead of CPSR_E) which meant that when we took an interrupt with SCTLR.EE set we would corrupt the CPSR. Signed-off-by: Julian Brown <julian@codesourcery.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 25b15dc100..b5b65caadf 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6438,7 +6438,7 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
/* Set new mode endianness */
env->uncached_cpsr &= ~CPSR_E;
if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) {
- env->uncached_cpsr |= ~CPSR_E;
+ env->uncached_cpsr |= CPSR_E;
}
env->daif |= mask;
/* this is a lie, as the was no c1_sys on V4T/V5, but who cares