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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-19 10:46:13 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-19 10:46:13 +0000
commita87aa10b85dcaf8e1a4cc962edbd562a96f78650 (patch)
tree161ed997d554a01c6469258493fd7b1eb17d389b /target-arm/helper.c
parent7997d92f2c75cf56e8142be8e4c1fb5b8dbcc2a4 (diff)
ARMv6: fix SIMD add/sub carry flags (Vincent Palatin).
After a quick code review, it seems to be a bad cut-n-paste between 16-bit and 8-bit UADD/USUB, indeed UADD8/USUB8 tries to set GE bits by pair instead of one at a time. Besides, the addition operations (UADD8/UADD16) set GE bits to "NOT carry" instead of "carry" (probably once again due to a copy of the substraction code which sets flags to "NOT borrow") git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4900 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5998b989b2..021f077f94 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2059,7 +2059,7 @@ static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
uint32_t sum; \
sum = (uint32_t)(uint16_t)(a) + (uint32_t)(uint16_t)(b); \
RESULT(sum, n, 16); \
- if ((sum >> 16) == 0) \
+ if ((sum >> 16) == 1) \
ge |= 3 << (n * 2); \
} while(0)
@@ -2067,8 +2067,8 @@ static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
uint32_t sum; \
sum = (uint32_t)(uint8_t)(a) + (uint32_t)(uint8_t)(b); \
RESULT(sum, n, 8); \
- if ((sum >> 8) == 0) \
- ge |= 3 << (n * 2); \
+ if ((sum >> 8) == 1) \
+ ge |= 1 << n; \
} while(0)
#define SUB16(a, b, n) do { \
@@ -2084,7 +2084,7 @@ static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
sum = (uint32_t)(uint8_t)(a) - (uint32_t)(uint8_t)(b); \
RESULT(sum, n, 8); \
if ((sum >> 8) == 0) \
- ge |= 3 << (n * 2); \
+ ge |= 1 << n; \
} while(0)
#define PFX u