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author | Greg Bellows <greg.bellows@linaro.org> | 2015-02-13 05:46:08 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-02-13 05:46:08 +0000 |
commit | ce02049dbf1828b4bc77d921b108a9d84246e5aa (patch) | |
tree | bc66b68d60c6999ffe2f327aa30bd97ab46512c7 /target-arm/cpu.h | |
parent | f313369fdb78f849ecbbd8e5d88f01ddf38786c8 (diff) |
target-arm: Add 32/64-bit register sync
Add AArch32 to AArch64 register sychronization functions.
Replace manual register synchronization with new functions in
aarch64_cpu_do_interrupt() and HELPER(exception_return)().
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1423736974-14254-4-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r-- | target-arm/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 1830a12d4a..11845a6644 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -495,6 +495,8 @@ typedef struct CPUARMState { ARMCPU *cpu_arm_init(const char *cpu_model); int cpu_arm_exec(CPUARMState *s); uint32_t do_arm_semihosting(CPUARMState *env); +void aarch64_sync_32_to_64(CPUARMState *env); +void aarch64_sync_64_to_32(CPUARMState *env); static inline bool is_a64(CPUARMState *env) { |