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authorBlue Swirl <blauwirbel@gmail.com>2012-09-04 20:25:59 +0000
committerBlue Swirl <blauwirbel@gmail.com>2012-09-15 17:44:32 +0000
commitd31dd73e48561de5f9d718febfb44224f7aab818 (patch)
treefef4014b287bcdb3c1085663d1a375160f6c6069 /target-arm/cpu.h
parent9ef392772597693b07959460f6c27b9b5a8287a1 (diff)
target-arm: final conversion to AREG0 free mode
Convert code load functions and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d7f93d98f0..7fac94f817 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -734,9 +734,10 @@ static inline void cpu_pc_from_tb(CPUARMState *env, TranslationBlock *tb)
}
/* Load an instruction and return it in the standard little-endian order */
-static inline uint32_t arm_ldl_code(uint32_t addr, bool do_swap)
+static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr,
+ bool do_swap)
{
- uint32_t insn = ldl_code(addr);
+ uint32_t insn = cpu_ldl_code(env, addr);
if (do_swap) {
return bswap32(insn);
}
@@ -744,9 +745,10 @@ static inline uint32_t arm_ldl_code(uint32_t addr, bool do_swap)
}
/* Ditto, for a halfword (Thumb) instruction */
-static inline uint16_t arm_lduw_code(uint32_t addr, bool do_swap)
+static inline uint16_t arm_lduw_code(CPUARMState *env, uint32_t addr,
+ bool do_swap)
{
- uint16_t insn = lduw_code(addr);
+ uint16_t insn = cpu_lduw_code(env, addr);
if (do_swap) {
return bswap16(insn);
}