diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 11:57:21 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 12:11:49 +0000 |
| commit | b22af022b22091f22deead5f0cbea332b6280acb (patch) | |
| tree | ccd33969dd386b6d77bac5809fc384918e4f3563 /target-arm/cpu.h | |
| parent | 7884849cc5b99f5e40217765d62809789ef76bc8 (diff) | |
target-arm: Remove c0_cachetype CPUARMState field
Remove the no-longer-used CPUARMState c0_cachetype field.
Although this was a constant register we had it in our
migration state. Drop this (with resulting version bump)
because for ARM currently we prefer cleaner migration
code and have not stabilised migration format yet.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 2630fe7739..27e398ba14 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -107,7 +107,6 @@ typedef struct CPUARMState { /* System control coprocessor (cp15) */ struct { uint32_t c0_cpuid; - uint32_t c0_cachetype; uint32_t c0_cssel; /* Cache size selection. */ uint32_t c1_sys; /* System control register. */ uint32_t c1_coproc; /* Coprocessor access register. */ @@ -664,7 +663,7 @@ static inline CPUARMState *cpu_init(const char *cpu_model) #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list -#define CPU_SAVE_VERSION 6 +#define CPU_SAVE_VERSION 7 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel |