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authorPeter Maydell <peter.maydell@linaro.org>2012-04-20 07:39:15 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-04-27 11:06:18 +0000
commitc5fad12fa08228d0c2f04089ba0cd27718f1b723 (patch)
tree11ae7d19c76bda0b22e0aed311546c5a0cd576e3 /target-arm/cpu-qom.h
parent778c3a0619f3b47f94e566ca4f656aabe5f4b3d6 (diff)
downloadqemu-arm-c5fad12fa08228d0c2f04089ba0cd27718f1b723.tar.gz
target-arm: Move A9 config_base_address reset value to ARMCPU
Move the A9 config_base_address cp15 register reset value to ARMCPU. This should become a QOM property so that the Highbank board can set it without having to pull in cpu-qom.h, but at least this avoids the implicit dependency on reset ordering that the previous workaround had. Cc: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-arm/cpu-qom.h')
-rw-r--r--target-arm/cpu-qom.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 2891521df4..a61c68d21b 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -93,6 +93,7 @@ typedef struct ARMCPU {
* in the order L1DCache, L1ICache, L2DCache, L2ICache, etc.
*/
uint32_t ccsidr[16];
+ uint32_t reset_cbar;
} ARMCPU;
static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)