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authorSergey Fedorov <serge.fdrv@gmail.com>2015-06-15 18:06:08 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-15 18:06:08 +0100
commit13b72b2b9aa7ab7ee129e38e9587acd6a1b9a932 (patch)
treee73eef2e6b0e214024a2e0016f080f154cde0b2a /target-arm/cpu-qom.h
parent8772de2c53b44c75f18140646aa928e6d77cb9d8 (diff)
target-arm: Fix REVIDR reset value
According to ARM Cortex-A53/A57 TRM, REVIDR reset value should be zero. So let REVIDR reset value be specified by CPU model and correct it for Cortex-A53/A57. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433321048-23793-2-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu-qom.h')
-rw-r--r--target-arm/cpu-qom.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index ed5a6441bb..c80381da89 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -127,6 +127,7 @@ typedef struct ARMCPU {
* prefix means a constant register.
*/
uint32_t midr;
+ uint32_t revidr;
uint32_t reset_fpsid;
uint32_t mvfr0;
uint32_t mvfr1;