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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-02-19 13:28:28 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-02-19 13:28:28 +0000 |
| commit | 531c179a6e98ea562e78b546761102b5ae9f7dcf (patch) | |
| tree | 6577a2b3b91c36c9f47a8b288a87f411167a12d9 /target-arm/cpu-qom.h | |
| parent | dd5e38b19d7cb07d317e1285941d8245c01da540 (diff) | |
target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEFmissing-idregs
The v8 ARM ARM defines that unused spaces in the ID_AA64* system
register ranges are Reserved and must RAZ, rather than being UNDEF.
Implement this.
In particular, ARM v8.2 adds a new feature register ID_AA64MMFR2,
and newer versions of the Linux kernel will attempt to read this,
which causes them not to boot up on versions of QEMU missing this fix.
Since the encoding .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 6
is actually defined in ARMv8 (as ID_MMFR4), we give it an entry in
the ARMCPU struct so CPUs can override it, though since none do
this too will just RAZ.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu-qom.h')
| -rw-r--r-- | target-arm/cpu-qom.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 1cc4502fc4..1061c08a10 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -155,6 +155,7 @@ typedef struct ARMCPU { uint32_t id_mmfr1; uint32_t id_mmfr2; uint32_t id_mmfr3; + uint32_t id_mmfr4; uint32_t id_isar0; uint32_t id_isar1; uint32_t id_isar2; |