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authorRichard Henderson <rth@twiddle.net>2014-03-19 00:02:22 -0700
committerRichard Henderson <rth@twiddle.net>2014-04-17 11:47:41 -0700
commit89fe090bb39295a15fa47d5bf2d906cf7e0e6474 (patch)
treea2044c4baf59d3239c0adac37b99ff21a5fa7366 /target-alpha
parent6b88b37c0efb183b0270ac41c57129813731a80f (diff)
downloadqemu-arm-89fe090bb39295a15fa47d5bf2d906cf7e0e6474.tar.gz
target-alpha: Convert opcode 0x18 to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha')
-rw-r--r--target-alpha/translate.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index e783e80d81..334091637e 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2677,6 +2677,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
goto invalid_opc;
}
break;
+
case 0x18:
switch ((uint16_t)disp16) {
case 0x0000:
@@ -2705,15 +2706,14 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break;
case 0xC000:
/* RPCC */
- if (ra != 31) {
- if (use_icount) {
- gen_io_start();
- gen_helper_load_pcc(cpu_ir[ra], cpu_env);
- gen_io_end();
- ret = EXIT_PC_STALE;
- } else {
- gen_helper_load_pcc(cpu_ir[ra], cpu_env);
- }
+ va = dest_gpr(ctx, ra);
+ if (use_icount) {
+ gen_io_start();
+ gen_helper_load_pcc(va, cpu_env);
+ gen_io_end();
+ ret = EXIT_PC_STALE;
+ } else {
+ gen_helper_load_pcc(va, cpu_env);
}
break;
case 0xE000: