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authorRichard Henderson <rth@twiddle.net>2014-03-19 09:28:55 -0700
committerRichard Henderson <rth@twiddle.net>2014-04-17 11:47:41 -0700
commit46010969f33677cc4a6f48f5718edc3c2e2e490c (patch)
treeff3b52e60bc632204093c36c6d36d06659fade32 /target-alpha
parentc67b67e511483769f408cfdad1859f145993362e (diff)
downloadqemu-arm-46010969f33677cc4a6f48f5718edc3c2e2e490c.tar.gz
target-alpha: Convert opcode 0x1E to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha')
-rw-r--r--target-alpha/translate.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 666430499c..3c198eb411 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2962,6 +2962,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
goto invalid_opc;
}
break;
+
case 0x1D:
/* HW_MTPR (PALcode) */
#ifndef CONFIG_USER_ONLY
@@ -2970,6 +2971,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
#else
goto invalid_opc;
#endif
+
case 0x1E:
/* HW_RET (PALcode) */
#ifndef CONFIG_USER_ONLY
@@ -2978,12 +2980,12 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
/* Pre-EV6 CPUs interpreted this as HW_REI, loading the return
address from EXC_ADDR. This turns out to be useful for our
emulation PALcode, so continue to accept it. */
- TCGv tmp = tcg_temp_new();
+ tmp = tcg_temp_new();
tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr));
gen_helper_hw_ret(cpu_env, tmp);
tcg_temp_free(tmp);
} else {
- gen_helper_hw_ret(cpu_env, cpu_ir[rb]);
+ gen_helper_hw_ret(cpu_env, load_gpr(ctx, rb));
}
ret = EXIT_PC_UPDATED;
break;