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authorRichard Henderson <rth@twiddle.net>2011-04-27 09:22:52 -0700
committerRichard Henderson <rth@twiddle.net>2011-10-08 08:49:09 -0700
commit034ebc2753e7d16879a91e4407c4e0706f63604e (patch)
tree2295fa229575afd9aeb071e29db3354f47f62cce /target-alpha/translate.c
parentbc24270e6471fb916a3816de9e63c31474392739 (diff)
downloadqemu-arm-034ebc2753e7d16879a91e4407c4e0706f63604e.tar.gz
target-alpha: Implement HALT IPR.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha/translate.c')
-rw-r--r--target-alpha/translate.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index c1ef465679..0acbd682d3 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1645,6 +1645,11 @@ static ExitStatus gen_mtpr(DisasContext *ctx, int rb, int regno)
tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUState, halted));
return gen_excp(ctx, EXCP_HLT, 0);
+ case 252:
+ /* HALT */
+ gen_helper_halt(tmp);
+ return EXIT_PC_STALE;
+
default:
/* The basic registers are data only, and unknown registers
are read-zero, write-ignore. */