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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-05 07:22:49 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-05 07:22:49 +0000
commiteddf68a6ac4b5ca6eb1efbb69e50d04878a87aa5 (patch)
treecb9274a4ae66c75bf7f7a6eee973e08ebfcc611e /softmmu_header.h
parent7a3148a955e3350720a01f57163ab230b72aca7e (diff)
Integrate Alpha target in Qemu core.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2601 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'softmmu_header.h')
-rw-r--r--softmmu_header.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/softmmu_header.h b/softmmu_header.h
index d5b3debc74..8c6cf74adb 100644
--- a/softmmu_header.h
+++ b/softmmu_header.h
@@ -63,6 +63,8 @@
#define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
#elif defined (TARGET_SH4)
#define CPU_MEM_INDEX ((env->sr & SR_MD) == 0)
+#elif defined (TARGET_ALPHA)
+#define CPU_MEM_INDEX ((env->ps >> 3) & 3)
#else
#error unsupported CPU
#endif
@@ -82,6 +84,8 @@
#define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
#elif defined (TARGET_SH4)
#define CPU_MEM_INDEX ((env->sr & SR_MD) == 0)
+#elif defined (TARGET_ALPHA)
+#define CPU_MEM_INDEX ((env->ps >> 3) & 3)
#else
#error unsupported CPU
#endif