diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-12-12 10:38:21 -0600 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-01-07 05:09:41 -1000 |
| commit | 1da8de39a39c55560cb4bf0cea94d598fea035cd (patch) | |
| tree | 59d8b4160b3342019ef5fd8c1392af7812de0713 /softmmu | |
| parent | df5d2b1658b988cb2be557e9f3114115935506ef (diff) | |
util: Enhance flush_icache_range with separate data pointer
We are shortly going to have a split rw/rx jit buffer. Depending
on the host, we need to flush the dcache at the rw data pointer and
flush the icache at the rx code pointer.
For now, the two passed pointers are identical, so there is no
effective change in behaviour.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'softmmu')
| -rw-r--r-- | softmmu/physmem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 8b9ffc41c2..6301f4f0a5 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2946,7 +2946,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, invalidate_and_set_dirty(mr, addr1, l); break; case FLUSH_CACHE: - flush_icache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr + l); + flush_idcache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr, l); break; } } |