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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-20 08:09:05 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-20 08:09:05 +0000
commita785e42e06ca502338e15cd87113049a6ae732b2 (patch)
tree7229d30e62be5b1aa8799fce925cd45cb8f48b7b /qemu-tech.texi
parent20b749f6079ba1f9a2959c88f22525d0fa49c1ac (diff)
Update Sparc parts in documentation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3413 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'qemu-tech.texi')
-rw-r--r--qemu-tech.texi10
1 files changed, 4 insertions, 6 deletions
diff --git a/qemu-tech.texi b/qemu-tech.texi
index 242bbb641f..9147096d93 100644
--- a/qemu-tech.texi
+++ b/qemu-tech.texi
@@ -199,9 +199,10 @@ FPU and MMU.
@item Full SPARC V8 emulation, including privileged
instructions, FPU and MMU. SPARC V9 emulation includes most privileged
-instructions, FPU and I/D MMU, but misses most VIS instructions.
+and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
-@item Can run most 32-bit SPARC Linux binaries and some handcrafted 64-bit SPARC Linux binaries.
+@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
+some 64-bit SPARC Linux binaries.
@end itemize
@@ -212,10 +213,7 @@ Current QEMU limitations:
@item IPC syscalls are missing.
@item 128-bit floating point operations are not supported, though none of the
-real CPUs implement them either. FCMPE[SD] are not correctly
-implemented. Floating point exception support is untested.
-
-@item Alignment is not enforced at all.
+real CPUs implement them either. Floating point exception support is untested.
@item Atomic instructions are not correctly implemented.