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authoredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-10 19:37:44 +0000
committeredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-10 19:37:44 +0000
commit94d45e4480250baa7a233377eb9ab47154e0873e (patch)
tree4d37f48fa96d47b3844ba3f028194ee041933eba /qemu-doc.texi
parent2f3a1b072a9d0f5b87a857655926618cb43faac0 (diff)
Correct a formatting issue (Carlo Marcelo Arenas Belon).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4417 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'qemu-doc.texi')
-rw-r--r--qemu-doc.texi4
1 files changed, 2 insertions, 2 deletions
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 8f611be730..cca483c1e4 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -1951,7 +1951,7 @@ Use @code{set architecture i8086} to dump 16 bit code. Then use
Advanced debugging options:
The default single stepping behavior is step with the IRQs and timer service routines off. It is set this way because when gdb executes a single step it expects to advance beyond the current instruction. With the IRQs and and timer service routines on, a single step might jump into the one of the interrupt or exception vectors instead of executing the current instruction. This means you may hit the same breakpoint a number of times before executing the instruction gdb wants to have executed. Because there are rare circumstances where you want to single step into an interrupt vector the behavior can be controlled from GDB. There are three commands you can query and set the single step behavior:
-@enumerate @code
+@table @code
@item maintenance packet qqemu.sstepbits
This will display the MASK bits used to control the single stepping IE:
@@ -1976,7 +1976,7 @@ This will change the single step mask, so if wanted to enable IRQs on the single
sending: "qemu.sstep=0x5"
received: "OK"
@end example
-@end enumerate
+@end table
@node pcsys_os_specific
@section Target OS specific information