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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-09-01 16:40:58 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-14 14:23:19 +0100 |
| commit | 7b56d1f4aebf25d81d7b73fe1e2aac2d66b8c0ce (patch) | |
| tree | 25509af00620a1ffe308d9c4b06c9520993aab81 /meson.build | |
| parent | 14a560359d24d0f30ced8a2613b83323e9302490 (diff) | |
hw/misc/a9scu: Simplify setting MemoryRegionOps::valid fields
Per the datasheet (DDI0407 r2p0):
"All SCU registers are byte accessible" and are 32-bit aligned.
Set MemoryRegionOps::valid min/max fields and simplify the write()
handler.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200901144100.116742-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'meson.build')
0 files changed, 0 insertions, 0 deletions