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authorAvi Kivity <avi@redhat.com>2011-07-26 14:26:15 +0300
committerAnthony Liguori <aliguori@us.ibm.com>2011-07-29 08:25:44 -0500
commitbf3fb0e12aeb9fea08383c145f874ed7acc29e31 (patch)
treee3ca0df903bbe8d129595a5ac289024174f3ee0d /ioport.c
parent62152b8a014609ac94da2de440aedb3246c1204a (diff)
ioport: register ranges by byte aligned addresses always
The I/O port space is byte addressable, even for word and long accesses. An example is the VMware svga card, which has long ports on offsets 0, 1, and 2. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'ioport.c')
-rw-r--r--ioport.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/ioport.c b/ioport.c
index 0d2611d142..a32483ba84 100644
--- a/ioport.c
+++ b/ioport.c
@@ -146,7 +146,7 @@ int register_ioport_read(pio_addr_t start, int length, int size,
hw_error("register_ioport_read: invalid size");
return -1;
}
- for(i = start; i < start + length; i += size) {
+ for(i = start; i < start + length; ++i) {
ioport_read_table[bsize][i] = func;
if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
hw_error("register_ioport_read: invalid opaque for address 0x%x",
@@ -166,7 +166,7 @@ int register_ioport_write(pio_addr_t start, int length, int size,
hw_error("register_ioport_write: invalid size");
return -1;
}
- for(i = start; i < start + length; i += size) {
+ for(i = start; i < start + length; ++i) {
ioport_write_table[bsize][i] = func;
if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
hw_error("register_ioport_write: invalid opaque for address 0x%x",