diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-01-14 17:06:03 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-02-15 14:10:07 +0000 |
| commit | 942fb9e13dff2e5ae2bfe74c1af4fae21732d533 (patch) | |
| tree | e92531cfde40b646d169dec394d1b762a2a2e93e /include/hw | |
| parent | 02284009afc5375cbece4816cea05242ab5ac8d7 (diff) | |
hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block
Support SSE variants like the SSE-300 with an ARMSSE_CPU_PWRCTRL register
block. Because this block is per-CPU and does not clash with any of the
SSE-200 devices, we handle it with a has_cpu_pwrctrl flag like the
existing has_cachectrl, has_cpusectrl and has_cpuid, rather than
trying to add per-CPU-device support to the devinfo array handling code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/arm/armsse.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 533ce329f6..b87630a6a7 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -103,6 +103,7 @@ #include "hw/misc/iotkit-sysinfo.h" #include "hw/misc/armsse-cpuid.h" #include "hw/misc/armsse-mhu.h" +#include "hw/misc/armsse-cpu-pwrctrl.h" #include "hw/misc/unimp.h" #include "hw/or-irq.h" #include "hw/clock.h" @@ -177,6 +178,8 @@ struct ARMSSE { ARMSSECPUID cpuid[SSE_MAX_CPUS]; + ARMSSECPUPwrCtrl cpu_pwrctrl[SSE_MAX_CPUS]; + /* * 'container' holds all devices seen by all CPUs. * 'cpu_container[i]' is the view that CPU i has: this has the |