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authorJing Liu <jing2.liu@linux.intel.com>2018-08-21 11:18:06 +0800
committerMichael S. Tsirkin <mst@redhat.com>2018-09-07 17:05:18 -0400
commit9e8993991ec002f36e642f9c24e80ab5845366f8 (patch)
treea1f1c592b1676083b945f295895bf8f838f6c4ff /include/hw/pci
parentdb812c4073c77c8a64db8d6663b3416a587c7b4a (diff)
hw/pci: factor PCI reserve resources to a separate structure
Factor "bus_reserve", "io_reserve", "mem_reserve", "pref32_reserve" and "pref64_reserve" fields of the "GenPCIERootPort" structure out to "PCIResReserve" structure, so that other PCI bridges can reuse it to add resource reserve capability. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/pci')
-rw-r--r--include/hw/pci/pci_bridge.h18
1 files changed, 13 insertions, 5 deletions
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 0347da52d2..cdff7edfd1 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -133,11 +133,19 @@ typedef struct PCIBridgeQemuCap {
#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
+/*
+ * PCI BUS/IO/MEM/PREFMEM additional resources recorded as a
+ * capability in PCI configuration space to reserve on firmware init.
+ */
+typedef struct PCIResReserve {
+ uint32_t bus;
+ uint64_t io;
+ uint64_t mem_non_pref;
+ uint64_t mem_pref_32;
+ uint64_t mem_pref_64;
+} PCIResReserve;
+
int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
- uint32_t bus_reserve, uint64_t io_reserve,
- uint64_t mem_non_pref_reserve,
- uint64_t mem_pref_32_reserve,
- uint64_t mem_pref_64_reserve,
- Error **errp);
+ PCIResReserve res_reserve, Error **errp);
#endif /* QEMU_PCI_BRIDGE_H */