path: root/include/fpu
diff options
authorPeter Maydell <peter.maydell@linaro.org>2014-02-20 10:35:50 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-02-20 10:35:50 +0000
commit67d43538aee10b6cfe8f3606c69187a3e142a2ba (patch)
tree4eb0637464a3011cc1ecc91b4e4ae9e6867d8445 /include/fpu
parentbc242f9bb6324a50e7572c0997904b66b630f73a (diff)
softfloat: Support halving the result of muladd operation
The ARMv8 instruction set includes a fused floating point reciprocal square root step instruction which demands an "(x * y + z) / 2" fused operation. Support this by adding a flag to the softfloat muladd operations which requests that the result is halved before rounding. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include/fpu')
1 files changed, 3 insertions, 0 deletions
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 806ae13780..4b4df88527 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -249,11 +249,14 @@ void float_raise( int8 flags STATUS_PARAM);
| Using these differs from negating an input or output before calling
| the muladd function in that this means that a NaN doesn't have its
| sign bit inverted before it is propagated.
+| We also support halving the result before rounding, as a special
+| case to support the ARM fused-sqrt-step instruction FRSQRTS.
enum {
float_muladd_negate_c = 1,
float_muladd_negate_product = 2,
float_muladd_negate_result = 4,
+ float_muladd_halve_result = 8,