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authormalc <av1474@comtv.ru>2012-08-27 18:33:20 +0400
committermalc <av1474@comtv.ru>2012-08-27 18:33:20 +0400
commitdf8002103c3e262dc40d7b5e0eb2171ba28b1d63 (patch)
treec1f3010fc5622b38280019d82f6fcc5792761d43 /hw
parent4f213879f3cc695644cfd8bf603495e7316c78f6 (diff)
Revert "vga: add some optional CGA compatibility hacks"
This reverts commit 482f7bf86b43af9f6903c52726fedf82b28bf953. Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw')
-rw-r--r--hw/pc.h4
-rw-r--r--hw/vga.c36
2 files changed, 8 insertions, 32 deletions
diff --git a/hw/pc.h b/hw/pc.h
index 37e2f87583..e4db0715b8 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -176,10 +176,6 @@ enum vga_retrace_method {
extern enum vga_retrace_method vga_retrace_method;
-#define VGA_CGA_HACK_PALETTE_BLANKING (1<<0)
-#define VGA_CGA_HACK_FONT_HEIGHT (1<<1)
-extern int vga_cga_hacks;
-
static inline DeviceState *isa_vga_init(ISABus *bus)
{
ISADevice *dev;
diff --git a/hw/vga.c b/hw/vga.c
index a65fc26ab7..f82ced8e66 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -547,31 +547,14 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
printf("vga: write CR%x = 0x%02x\n", s->cr_index, val);
#endif
/* handle CR0-7 protection */
- if (s->cr[VGA_CRTC_V_SYNC_END] & VGA_CR11_LOCK_CR0_CR7) {
- if (s->cr_index <= VGA_CRTC_OVERFLOW) {
- /* can always write bit 4 of CR7 */
- if (s->cr_index == VGA_CRTC_OVERFLOW) {
- s->cr[VGA_CRTC_OVERFLOW] =
- (s->cr[VGA_CRTC_OVERFLOW] & ~0x10) | (val & 0x10);
- }
- return;
- } else if ((vga_cga_hacks & VGA_CGA_HACK_FONT_HEIGHT) &&
- !(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
- /* extra CGA compatibility hacks (not in standard VGA) */
- if (s->cr_index == VGA_CRTC_MAX_SCAN &&
- val == 7 &&
- (s->cr[VGA_CRTC_MAX_SCAN] & 0xf) == 0xf) {
- return;
- } else if (s->cr_index == VGA_CRTC_CURSOR_START &&
- val == 6 &&
- (s->cr[VGA_CRTC_MAX_SCAN] & 0xf) == 0xf) {
- val = 0xd;
- } else if (s->cr_index == VGA_CRTC_CURSOR_END &&
- val == 7 &&
- (s->cr[VGA_CRTC_MAX_SCAN] & 0xf) == 0xf) {
- val = 0xe;
- }
+ if ((s->cr[VGA_CRTC_V_SYNC_END] & VGA_CR11_LOCK_CR0_CR7) &&
+ s->cr_index <= VGA_CRTC_OVERFLOW) {
+ /* can always write bit 4 of CR7 */
+ if (s->cr_index == VGA_CRTC_OVERFLOW) {
+ s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x10) |
+ (val & 0x10);
}
+ return;
}
s->cr[s->cr_index] = val;
@@ -1903,10 +1886,7 @@ static void vga_update_display(void *opaque)
/* nothing to do */
} else {
full_update = 0;
- if (!(s->ar_index & 0x20) &&
- /* extra CGA compatibility hacks (not in standard VGA */
- (!(vga_cga_hacks & VGA_CGA_HACK_PALETTE_BLANKING) ||
- (s->ar_index != 0 && s->ar_flip_flop))) {
+ if (!(s->ar_index & 0x20)) {
graphic_mode = GMODE_BLANK;
} else {
graphic_mode = s->gr[VGA_GFX_MISC] & VGA_GR06_GRAPHICS_MODE;