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authorAndreas Färber <afaerber@suse.de>2013-01-17 22:30:20 +0100
committerAndreas Färber <afaerber@suse.de>2013-03-12 10:35:55 +0100
commitd8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (patch)
tree57f8deccddd53e7aab5ca75d1d194da635a35790 /hw/unicore32
parent259186a7d2f7184efc96ae99bc5658e6159f53ad (diff)
exec: Pass CPUState to cpu_reset_interrupt()
Move it to qom/cpu.c to avoid build failures depending on include order of cpu-qom.h and exec/cpu-all.h. Change opaques of various ..._irq_handler() functions to the appropriate CPU type to facilitate using cpu_reset_interrupt(). Fix Coding Style issues while at it (missing braces, indentation). Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/unicore32')
-rw-r--r--hw/unicore32/puv3.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
index f9d0c2bab1..6e87c41f28 100644
--- a/hw/unicore32/puv3.c
+++ b/hw/unicore32/puv3.c
@@ -26,13 +26,15 @@
static void puv3_intc_cpu_handler(void *opaque, int irq, int level)
{
- CPUUniCore32State *env = opaque;
+ UniCore32CPU *cpu = opaque;
+ CPUUniCore32State *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
assert(irq == 0);
if (level) {
cpu_interrupt(env, CPU_INTERRUPT_HARD);
} else {
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
}
}
@@ -44,7 +46,8 @@ static void puv3_soc_init(CPUUniCore32State *env)
int i;
/* Initialize interrupt controller */
- cpu_intc = qemu_allocate_irqs(puv3_intc_cpu_handler, env, 1);
+ cpu_intc = qemu_allocate_irqs(puv3_intc_cpu_handler,
+ uc32_env_get_cpu(env), 1);
dev = sysbus_create_simple("puv3_intc", PUV3_INTC_BASE, *cpu_intc);
for (i = 0; i < PUV3_IRQS_NR; i++) {
irqs[i] = qdev_get_gpio_in(dev, i);