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authorDmitry Osipenko <digetx@gmail.com>2015-07-06 04:27:12 +0300
committerPeter Maydell <peter.maydell@linaro.org>2015-07-06 10:26:35 +0100
commit257621a9566054472d1d55a819880d0f9da02bda (patch)
treee72d79039c7a01270f4869331f5aecd2840dc264 /hw/timer/arm_mptimer.c
parent8a52340cbaf60d4dd0a78bbfe12632639fe3da6d (diff)
downloadqemu-arm-257621a9566054472d1d55a819880d0f9da02bda.tar.gz
arm_mptimer: Respect IT bit statepull-target-arm-20150706
The timer should fire the interrupt only if the IT (interrupt enable) bit state of the control register is enabled. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer/arm_mptimer.c')
-rw-r--r--hw/timer/arm_mptimer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c
index 0e132b15b5..3e59c2a288 100644
--- a/hw/timer/arm_mptimer.c
+++ b/hw/timer/arm_mptimer.c
@@ -38,7 +38,7 @@ static inline int get_current_cpu(ARMMPTimerState *s)
static inline void timerblock_update_irq(TimerBlock *tb)
{
- qemu_set_irq(tb->irq, tb->status);
+ qemu_set_irq(tb->irq, tb->status && (tb->control & 4));
}
/* Return conversion factor from mpcore timer ticks to qemu timer ticks. */