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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2017-12-21 07:32:57 +0000
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2018-01-09 21:31:31 +0000
commit4272ad40189c73324da59047f5232ec795111c4b (patch)
tree13ec49b499502b2a11c1316933489ef2d7d32670 /hw/sparc64
parent2a4d6af51b8330bfd7a7dd677927b8dd2f5f5f08 (diff)
apb: move the two secondary PCI bridges objects into APBState
This enables us to remove these parameters from pci_apb_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/sparc64')
-rw-r--r--hw/sparc64/sun4u.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 2afd3f28dd..47952befcb 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -27,6 +27,7 @@
#include "cpu.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
+#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci-host/apb.h"
#include "hw/i386/pc.h"
@@ -501,7 +502,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
prom_init(hwdef->prom_addr, bios_name);
- apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, &pci_busA, &pci_busB);
+ apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE);
/* Wire up PCI interrupts to CPU */
for (i = 0; i < IVEC_MAX; i++) {
@@ -510,6 +511,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
}
pci_bus = PCI_HOST_BRIDGE(apb)->bus;
+ pci_busA = pci_bridge_get_sec_bus(apb->bridgeA);
+ pci_busB = pci_bridge_get_sec_bus(apb->bridgeB);
/* Only in-built Simba PBMs can exist on the root bus, slot 0 on busA is
reserved (leaving no slots free after on-board devices) however slots