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authorBernhard M. Wiedemann <qemudevbmw@lsmod.de>2010-04-20 20:48:06 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2010-05-03 16:03:19 -0500
commitec5f92ce6ac8ec09056be77e03c941be188648fa (patch)
treedc815e2c9d68798d43e62bcde22ce6cc20d2d07e /hw/piix_pci.c
parentcb4e5f8ed1b648c451491b10dc92b1af1e324535 (diff)
hw: better i440 emulation
updated version of an old patch http://xenon.stanford.edu/~eswierk/misc/qemu-linuxbios/qemu-piix-ram-size.patch that together with http://www.mail-archive.com/linuxbios@linuxbios.org/msg02390.html (which is already in coreboot trunk) allows coreboot to autodetect the amount of RAM within qemu/kvm from a register in i440 northbridge. The message on the old patch states: Unfortunately the current version of qemu does not set these registers, but I have patched qemu so that it emulates the i440 more faithfully in this regard. Signed-off-by: Bernhard M. Wiedemann <qemudevbmw@lsmod.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/piix_pci.c')
-rw-r--r--hw/piix_pci.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index cd12212fff..97519dbb5f 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -213,7 +213,7 @@ static int i440fx_initfn(PCIDevice *dev)
return 0;
}
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic)
+PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic, int ram_size)
{
DeviceState *dev;
PCIBus *b;
@@ -238,6 +238,11 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *
*piix3_devfn = piix3->dev.devfn;
+ ram_size = ram_size / 8 / 1024 / 1024;
+ if (ram_size > 255)
+ ram_size = 255;
+ (*pi440fx_state)->dev.config[0x57]=ram_size;
+
return b;
}