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authorPeter Maydell <peter.maydell@linaro.org>2015-07-06 23:37:53 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-07-06 23:37:53 +0100
commitf6e3035f75e5c6a73485335765ae070304c7a110 (patch)
tree60f388e6585b7075c1a721e14c6ce12f1bd394de /hw/isa/lpc_ich9.c
parent7edd8e4660beb301d527257f8e04ebec0f841cb0 (diff)
parent355023f2010c4df619d88a0dd7012b4b9c74c12c (diff)
downloadqemu-arm-f6e3035f75e5c6a73485335765ae070304c7a110.tar.gz
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream-smm' into staging
This series implements KVM support for SMM, and lets you enable/disable it through the "smm" property of x86 machine types. # gpg: Signature made Mon Jul 6 17:41:05 2015 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream-smm: pc: add SMM property ich9: add smm_enabled field and arguments pc_piix: rename kvm_enabled to smm_enabled target-i386: register a separate KVM address space including SMRAM regions kvm-all: kvm_irqchip_create is not expected to fail kvm-all: add support for multiple address spaces kvm-all: make KVM's memory listener more generic kvm-all: move internal types to kvm_int.h kvm-all: remove useless typedef kvm-all: put kvm_mem_flags to more work target-i386: add support for SMBASE MSR and SMIs piix4/ich9: do not raise SMI on ACPI enable/disable commands linux-headers: Update to 4.2-rc1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/isa/lpc_ich9.c')
-rw-r--r--hw/isa/lpc_ich9.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index b3e0b1fd52..bd655b8405 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -357,11 +357,13 @@ static void ich9_set_sci(void *opaque, int irq_num, int level)
}
}
-void ich9_lpc_pm_init(PCIDevice *lpc_pci)
+void ich9_lpc_pm_init(PCIDevice *lpc_pci, bool smm_enabled)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci);
+ qemu_irq sci_irq;
- ich9_pm_init(lpc_pci, &lpc->pm, qemu_allocate_irq(ich9_set_sci, lpc, 0));
+ sci_irq = qemu_allocate_irq(ich9_set_sci, lpc, 0);
+ ich9_pm_init(lpc_pci, &lpc->pm, smm_enabled, sci_irq);
ich9_lpc_reset(&lpc->d.qdev);
}
@@ -375,6 +377,9 @@ static void ich9_apm_ctrl_changed(uint32_t val, void *arg)
acpi_pm1_cnt_update(&lpc->pm.acpi_regs,
val == ICH9_APM_ACPI_ENABLE,
val == ICH9_APM_ACPI_DISABLE);
+ if (val == ICH9_APM_ACPI_ENABLE || val == ICH9_APM_ACPI_DISABLE) {
+ return;
+ }
/* SMI_EN = PMBASE + 30. SMI control and enable register */
if (lpc->pm.smi_en & ICH9_PMIO_SMI_EN_APMC_EN) {