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authorPeter Maydell <peter.maydell@linaro.org>2017-02-20 14:04:41 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-02-20 14:04:41 +0000
commit6cbf97bf937743974938464d11f5dcd0366d0709 (patch)
tree2cec3986628a27a8f39962a00334be0fc84a1e19 /hw/intc/armv7m_nvic.c
parentb6a915dec8706e427f75231c8fc1ee728a1cef02 (diff)
downloadqemu-arm-6cbf97bf937743974938464d11f5dcd0366d0709.tar.gz
armv7m: Fix condition check for taking exceptions
The M profile condition for when we can take a pending exception or interrupt is not the same as that for A/R profile. The code originally copied from the A/R profile version of the cpu_exec_interrupt function only worked by chance for the very simple case of exceptions being masked by PRIMASK. Replace it with a call to a function in the NVIC code that correctly compares the priority of the pending exception against the current execution priority of the CPU. [Michael Davidsaver's patchset had a patch to do something similar but the implementation ended up being a rewrite.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Diffstat (limited to 'hw/intc/armv7m_nvic.c')
-rw-r--r--hw/intc/armv7m_nvic.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index fb4c985c54..6a03e2c4c2 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -286,6 +286,13 @@ static inline int nvic_exec_prio(NVICState *s)
return MIN(running, s->exception_prio);
}
+bool armv7m_nvic_can_take_pending_exception(void *opaque)
+{
+ NVICState *s = opaque;
+
+ return nvic_exec_prio(s) > nvic_pending_prio(s);
+}
+
/* caller must call nvic_irq_update() after this */
static void set_prio(NVICState *s, unsigned irq, uint8_t prio)
{