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authorIgor V. Kovalenko <igor.v.kovalenko@gmail.com>2010-04-23 01:54:45 +0400
committerBlue Swirl <blauwirbel@gmail.com>2010-05-01 19:44:43 +0000
commit70ae65f5d91462e1905a53236179fde21cda3a2f (patch)
tree3a8aa8c27ce6c8e7560e9cbdb7e27d0ec6f0db66 /hw/ide/cmd646.c
parent9ed7b059ef776a3921cfd085e891f45076922542 (diff)
cmd646: pass pci_dev as it needs it
Instead of doing tricks to get the pci_dev, just pass it in the 1st place. Patch is a bit longer that reverting the pci_dev field, but it states more clearly (IMHO) what we are doing. It also fixes the bm test, now that you told me that ->unit is not always valid. Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/ide/cmd646.c')
-rw-r--r--hw/ide/cmd646.c61
1 files changed, 45 insertions, 16 deletions
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 0875de4988..c6ed0b707a 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -68,15 +68,9 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
}
}
-static PCIIDEState *pci_from_bm(BMDMAState *bm)
+static uint32_t bmdma_readb_common(PCIIDEState *pci_dev, BMDMAState *bm,
+ uint32_t addr)
{
- return bm->pci_dev;
-}
-
-static uint32_t bmdma_readb(void *opaque, uint32_t addr)
-{
- BMDMAState *bm = opaque;
- PCIIDEState *pci_dev = pci_from_bm(bm);
uint32_t val;
switch(addr & 3) {
@@ -90,7 +84,7 @@ static uint32_t bmdma_readb(void *opaque, uint32_t addr)
val = bm->status;
break;
case 3:
- if (bm->unit == 0) {
+ if (bm == &pci_dev->bmdma[0]) {
val = pci_dev->dev.config[UDIDETCR0];
} else {
val = pci_dev->dev.config[UDIDETCR1];
@@ -106,10 +100,25 @@ static uint32_t bmdma_readb(void *opaque, uint32_t addr)
return val;
}
-static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val)
+static uint32_t bmdma_readb_0(void *opaque, uint32_t addr)
+{
+ PCIIDEState *pci_dev = opaque;
+ BMDMAState *bm = &pci_dev->bmdma[0];
+
+ return bmdma_readb_common(pci_dev, bm, addr);
+}
+
+static uint32_t bmdma_readb_1(void *opaque, uint32_t addr)
+{
+ PCIIDEState *pci_dev = opaque;
+ BMDMAState *bm = &pci_dev->bmdma[1];
+
+ return bmdma_readb_common(pci_dev, bm, addr);
+}
+
+static void bmdma_writeb_common(PCIIDEState *pci_dev, BMDMAState *bm,
+ uint32_t addr, uint32_t val)
{
- BMDMAState *bm = opaque;
- PCIIDEState *pci_dev = pci_from_bm(bm);
#ifdef DEBUG_IDE
printf("bmdma: writeb 0x%02x : 0x%02x\n", addr, val);
#endif
@@ -123,7 +132,7 @@ static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val)
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
break;
case 3:
- if (bm->unit == 0)
+ if (bm == &pci_dev->bmdma[0])
pci_dev->dev.config[UDIDETCR0] = val;
else
pci_dev->dev.config[UDIDETCR1] = val;
@@ -131,6 +140,22 @@ static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val)
}
}
+static void bmdma_writeb_0(void *opaque, uint32_t addr, uint32_t val)
+{
+ PCIIDEState *pci_dev = opaque;
+ BMDMAState *bm = &pci_dev->bmdma[0];
+
+ bmdma_writeb_common(pci_dev, bm, addr, val);
+}
+
+static void bmdma_writeb_1(void *opaque, uint32_t addr, uint32_t val)
+{
+ PCIIDEState *pci_dev = opaque;
+ BMDMAState *bm = &pci_dev->bmdma[1];
+
+ bmdma_writeb_common(pci_dev, bm, addr, val);
+}
+
static void bmdma_map(PCIDevice *pci_dev, int region_num,
pcibus_t addr, pcibus_t size, int type)
{
@@ -141,13 +166,17 @@ static void bmdma_map(PCIDevice *pci_dev, int region_num,
BMDMAState *bm = &d->bmdma[i];
d->bus[i].bmdma = bm;
bm->bus = d->bus+i;
- bm->pci_dev = d;
qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
- register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
- register_ioport_read(addr, 4, 1, bmdma_readb, bm);
+ if (i == 0) {
+ register_ioport_write(addr + 1, 3, 1, bmdma_writeb_0, d);
+ register_ioport_read(addr, 4, 1, bmdma_readb_0, d);
+ } else {
+ register_ioport_write(addr + 1, 3, 1, bmdma_writeb_1, d);
+ register_ioport_read(addr, 4, 1, bmdma_readb_1, d);
+ }
register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);