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authorPeter Maydell <peter.maydell@linaro.org>2021-02-12 13:32:27 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-02-15 14:10:08 +0000
commit513e70ea1bf30e039b883407fd9b3ea06e20d6f2 (patch)
tree50f9815f9ba78983e4153f2fdd4ac806f0799bae /hw/arm
parentb6daba7bc5968f58769812aa4df88535f634dba9 (diff)
downloadqemu-arm-513e70ea1bf30e039b883407fd9b3ea06e20d6f2.tar.gz
hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register
For the AN547 image, the FPGAIO block has an extra DBGCTRL register, which is used to control the SPNIDEN, SPIDEN, NPIDEN and DBGEN inputs to the CPU. These signals control when the CPU permits use of the external debug interface. Our CPU models don't implement the external debug interface, so we model the register as reads-as-written. Implement the register, with a property defining whether it is present, and allow mps2-tz boards to specify that it is present. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/mps2-tz.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 779fdb9a54..fe324e86b3 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -110,6 +110,7 @@ struct MPS2TZMachineClass {
const uint32_t *oscclk;
uint32_t fpgaio_num_leds; /* Number of LEDs in FPGAIO LED0 register */
bool fpgaio_has_switches; /* Does FPGAIO have SWITCH register? */
+ bool fpgaio_has_dbgctrl; /* Does FPGAIO have DBGCTRL register? */
int numirq; /* Number of external interrupts */
int uart_overflow_irq; /* number of the combined UART overflow IRQ */
const RAMInfo *raminfo;
@@ -412,6 +413,7 @@ static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque,
object_initialize_child(OBJECT(mms), "fpgaio", fpgaio, TYPE_MPS2_FPGAIO);
qdev_prop_set_uint32(DEVICE(fpgaio), "num-leds", mmc->fpgaio_num_leds);
qdev_prop_set_bit(DEVICE(fpgaio), "has-switches", mmc->fpgaio_has_switches);
+ qdev_prop_set_bit(DEVICE(fpgaio), "has-dbgctrl", mmc->fpgaio_has_dbgctrl);
sysbus_realize(SYS_BUS_DEVICE(fpgaio), &error_fatal);
return sysbus_mmio_get_region(SYS_BUS_DEVICE(fpgaio), 0);
}
@@ -1036,6 +1038,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
mmc->len_oscclk = ARRAY_SIZE(an505_oscclk);
mmc->fpgaio_num_leds = 2;
mmc->fpgaio_has_switches = false;
+ mmc->fpgaio_has_dbgctrl = false;
mmc->numirq = 92;
mmc->uart_overflow_irq = 47;
mmc->raminfo = an505_raminfo;
@@ -1060,6 +1063,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
mmc->len_oscclk = ARRAY_SIZE(an505_oscclk);
mmc->fpgaio_num_leds = 2;
mmc->fpgaio_has_switches = false;
+ mmc->fpgaio_has_dbgctrl = false;
mmc->numirq = 92;
mmc->uart_overflow_irq = 47;
mmc->raminfo = an505_raminfo; /* AN521 is the same as AN505 here */
@@ -1084,6 +1088,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
mmc->len_oscclk = ARRAY_SIZE(an524_oscclk);
mmc->fpgaio_num_leds = 10;
mmc->fpgaio_has_switches = true;
+ mmc->fpgaio_has_dbgctrl = false;
mmc->numirq = 95;
mmc->uart_overflow_irq = 47;
mmc->raminfo = an524_raminfo;