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authorPeter Maydell <peter.maydell@linaro.org>2018-01-26 14:24:25 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-01-26 14:24:25 +0000
commite607bbee553cfe73072870cef458cfa4e78133e2 (patch)
tree922b5533738bae88adfdbc0211aba2ab355657c4 /hw/arm/xlnx-zynqmp.c
parentd45091e449c4202b19bb8996f8e95176c758114b (diff)
parent0ab7bbc75bc167f06a74379e8a8d2d6f9a78888b (diff)
Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2018-01-26.for-upstream' into staging
Xilinx queue # gpg: Signature made Fri 26 Jan 2018 10:17:01 GMT # gpg: using RSA key 0x29C596780F6BCA83 # gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" # gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" # Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83 * remotes/edgar/tags/edgar/xilinx-next-2018-01-26.for-upstream: xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC xlnx-zynqmp-pmu: Connect the IPI device to the PMU xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device xlnx-zynqmp-pmu: Connect the PMU interrupt controller xlnx-pmu-iomod-intc: Add the PMU Interrupt controller aarch64-softmmu.mak: Use an ARM specific config xlnx-zynqmp-pmu: Add the CPU and memory xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU microblaze: boot.c: Don't try to find NULL file Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xlnx-zynqmp.c')
-rw-r--r--hw/arm/xlnx-zynqmp.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 325642058b..ca398c4159 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -50,6 +50,9 @@
#define DPDMA_ADDR 0xfd4c0000
#define DPDMA_IRQ 116
+#define IPI_ADDR 0xFF300000
+#define IPI_IRQ 64
+
static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
0xFF0B0000, 0xFF0C0000, 0xFF0D0000, 0xFF0E0000,
};
@@ -183,6 +186,9 @@ static void xlnx_zynqmp_init(Object *obj)
object_initialize(&s->dpdma, sizeof(s->dpdma), TYPE_XLNX_DPDMA);
qdev_set_parent_bus(DEVICE(&s->dpdma), sysbus_get_default());
+
+ object_initialize(&s->ipi, sizeof(s->ipi), TYPE_XLNX_ZYNQMP_IPI);
+ qdev_set_parent_bus(DEVICE(&s->ipi), sysbus_get_default());
}
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -454,6 +460,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
&error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->dpdma), 0, DPDMA_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dpdma), 0, gic_spi[DPDMA_IRQ]);
+
+ object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);
}
static Property xlnx_zynqmp_props[] = {